1) Field of the Invention
The present invention relates to a bit sequence reversing device for reversing a sequence of data having a plurality of blocks, each of which has a predetermined number of bits.
2) Description of the Related Art
In a microcomputer system having a plurality of large scale integrated circuits (LSI's), there is usually a difference between the data formats (i.e., the data pins) thereof. For example, a 32-bit microprocessor (MPU) has data pins D.sub.0, D.sub.1, . . . , and D.sub.31 which have the following weights: ##EQU1## In this case, the data pin D.sub.0 represents a least significant bit (LSB) and the data pin D.sub.31 represents a most significant bit (MSB). Conversely, a peripheral circuit such as a 32-bit memory control unit (MCU) has data pins D.sub.0 ', D.sub.1 ', . . . and D.sub.31 ' which have the following weights: ##EQU2## In this case, the data pin D.sub.0 ' represents an MSB, and D.sub.31 ' represents an LSB. Therefore, when data of the MCU is fetched by the MPU, the MPU has to reverse the bit sequence of the fetched data to conform to the data format of the MPU. This reversion is called "endian conversion".
In the prior art, the above-mentioned reversion of a bit sequence is carried out by pure software in the MPU. According to this software, it is possible to reverse not only all the bits of data (i.e., one word), but also a required half word (16 bits) or a required byte (8 bits). However, this requires a large number of programming steps which invites a long execution time.
In order to reduce such a long execution time, hardware for reversing all the 32-bits of data may be provided in the MPU. In this case, however, it is impossible to adapt the hardware to reverse a half word (16 bits) or a byte (8 bits).